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  rev 2.1 ?2012 advanced linear devices, inc. 415 tasman drive, sunnyvale, ca 94089-1706 tel: (408) 747-1155 fax: (408) 747-1286 www.aldinc.com pin configuration general description ald110808a/ald110808/ald110908a/ald110908 are high precision monolithic quad/dual enhancement mode n-channel mosfets matched at the factory using ald?s proven epad? cmos technology. these de- vices are intended for low voltage, small signal applications. these mosfet devices are built on the same monolithic chip, so they exhibit excellent temperature tracking characteristics. they are versatile as circuit elements and are useful design component for a broad range of analog applications. they are basic building blocks for current sources, differential amplifier input stages, transmission gates, and multiplexer applications. for most applications, connect the v- and ic pins to the most negative voltage in the system and the v+ pin to the most positive voltage. all other pins must have voltages within these voltage limits at all times. ald110808/ald110908 devices are built for minimum offset voltage and differential thermal response, and they are suited for switching and ampli- fying applications in +1.0v to +10v (+/- 5 v) systems where low input bias current, low input capacitance and fast switching speed are desired. as these are mosfet devices, they feature very large (almost infinite) cur- rent gain in a low frequency, or near dc, operating environment. these devices are suitable for use in precision applications which require very high current gain, beta, such as current mirrors and current sources. the high input impedance and the high dc current gain of the field effect transistors result from extremely low current loss through the control gate. the dc current gain is limited by the gate input leakage current, which is specified at 30pa at room temperature. for example, dc beta of the device at a drain current of 3ma and input leakage current of 30pa at 25 c is = 3ma/30pa = 100,000,000. features ? enhancement-mode (normally off) ? standard gate threshold voltages: +0.80v ? matched mosfet to mosfet characteristics ? tight lot to lot parametric control ? low input capacitance ? v gs(th) match to 2mv and 10mv ? high input impedance ? 10 12 ? typical ? positive, zero, and negative v gs(th) temperature coefficient ? dc current gain >10 8 ? low input and output leakage currents applications ? precision current mirrors ? precision current sources ? voltage choppers ? differential amplifier input stage ? voltage comparator ? voltage bias circuits ? sample and hold ? analog inverter ? level shifters ? source followers and buffers ? current multipliers ? analog switches / multiplexers * contact factory for industrial temp. range or user-specified threshold voltage values. operating temperature range* 0 c to +70 c0 c to +70 c 16-pin 16-pin 8-pin 8-pin soic plastic dip soic plastic dip package package package package ALD110808ASCL ald110808apcl ald110908asal ald110908apal ald110808scl ald110808pcl ald110908sal ald110908pal e epad tm ? n a b l e d e a daned l nea d ee n ald110808/ald110808a/ald110908/ald110908a v gs(th) = +0.80v quad/dual n-channel enhancement mode epad? precision matched pair mosfet array *ic pins are internally connected. connect to v- scl, pcl packages sal, pal packages ald110808 ald110908 ic* 1 2 3 14 15 16 4 13 5 12 ic* 6 7 8 10 11 g n1 d n1 ic* d n4 ic* g n4 9 g n3 d n3 d n2 g n2 v + s 34 s 12 v - v + v - m 4 m 3 m 1 m 2 v - v - v - v - v - g n1 d n1 s 12 d n2 g n2 1 2 3 6 7 8 4 5 m 1 m 2 v - v - v - ic* ic* ordering information (?l? suffix denotes lead-free (rohs))
ald110808/ald110808a/ald110908/ald110908a advanced linear devices 2 of 11 absolute maximum ratings drain-source voltage, v ds 10.6v gate-source voltage, v gs 10.6v power dissipation 500 mw operating temperature range scl, pcl, sal, pal package 0 c to +70 c storage temperature range -65 c to +150 c lead temperature, 10 seconds +260 c caution: esd sensitive device. use static control procedures in esd controlled environment. notes: 1 consists of junction leakage currents operating electrical characteristics v + = +5v v - = gnd t a = 25 c unless otherwise specified parameter symbol min typ max min typ max unit test conditions gate threshold voltage v gs(th) 0.78 0.80 0.82 0.78 0.80 0.82 v i ds =1 a, v ds = 0.1v offset voltage v os 12 310mv v gs(th)1 -v gs(th)2 offset voltage tempco tc vos 55 v/ cv ds1 = v ds2 gatethreshold voltage tempco tc vgs(th) -1.7 -1.7 mv/ ci d = 1 a, v ds = 0.1v 0.0 0.0 i d = 20 a, v ds = 0.1v +1.6 +1.6 i d = 40 a, v ds = 0.1v on drain current i ds (on) 12.0 12.0 ma v gs = +10.3v, v ds = +5v 3.0 3.0 v gs = +4.8v, v ds = +5v forward transconductance g fs 1.4 1.4 mmho v gs = +4.8v v ds = +9.8v transconductance mismatch ? g fs 1.8 1.8 % output conductance g os 68 68 mho v gs = +4.8v v ds = +9.8v drain source on resistance r ds (on) 500 500 ? v ds = +0.1v v gs = +4.8v drain source on resistance ? r ds (on) 0.5 0.5 % mismatch drain source breakdown bv dsx 10 10 v i ds = 1.0 a voltage v - = v gs = -1.0v drain source leakage current 1 i ds (off) 10 400 10 400 pa v gs = -0.2v, v ds =+5v v - = -5v 44nat a = 125 c gate leakage current 1 i gss 3 200 3 200 pa v ds = 0v v gs = +5v 11nat a =125 c input capacitance c iss 2.5 2.5 pf transfer reverse capacitance c rss 0.1 0.1 pf turn-on delay time t on 10 10 ns v + = 5v r l = 5k ? turn-off delay time t off 10 10 ns v + = 5v r l = 5k ? crosstalk 60 60 db f = 100khz ald110808a/ald110908a ald110808/ald110908
ald110808/ald110808a/ald110908/ald110908a advanced linear devices 3 of 11 ald1108xx/ald1109xx/ald1148xx/ald1149xx are monolithic quad/dual n-channel mosfets matched at the factory using ald?s proven epad? cmos technology. these devices are intended for low voltage, small signal applications. ald?s electrically programmable analog device (epad) technol- ogy provides the industry?s only family of matched transistors with a range of precision threshold values. all members of this family are designed and actively programmed for exceptional matching of device electrical characteristics. threshold values range from - 3.50v depletion to +3.50v enhancement devices, including stan- dard products specified at -3.50v, -1.30v, -0.40v, +0.00v, +0.20v, +0.40v, +0.80v, +1.40v, and +3.30v. ald can also provide any customer desired value between -3.50v and +3.50v. for all these devices, even the depletion and zero threshold transistors, ald epad technology enables the same well controlled turn-off, sub- threshold, and low leakage characteristics as standard enhance- ment mode mosfets. with the design and active programming, even units from different batches and different date of manufacture have well matched characteristics. as these devices are on the same monolithic chip, they also exhibit excellent tempco tracking. this epad mosfet array product family (epad mosfet) is avail- able in the three separate categories, each providing a distinctly different set of electrical specifications and characteristics. the first category is the ald110800/ald110900 zero-threshold ? mode epad mosfets. the second category is the ald1108xx/ ald1109xx enhancement mode epad mosfets. the third cat- egory is the ald1148xx/ald1149xx depletion mode epad mosfets. (the suffix ?xx? denotes threshold voltage in 0.1 v steps, for example, xx=08 denotes 0.80v). the ald110800/ald110900 (quad/dual) are epad mosfets in which the individual threshold voltage of each mosfet is fixed at zero. the threshold voltage is defined as i ds = 1ua @ v ds = 0.1v when the gate voltage v gs = 0.00v. zero threshold devices oper- ate in the enhancement region when operated above threshold volt- age and current level (v gs > 0.00v and i ds > 1ua) and subthresh- old region when operated at or below threshold voltage and cur- rent level (v gs <= 0.00v and i ds < 1ua). this device, along with other very low threshold voltage members of the product family, constitute a class of epad mosfets that enable ultra low supply voltage operation and nanopower type of circuit designs, applicable in either analog or digital circuits. the ald1108xx/ald1109xx (quad/dual) product family features precision matched enhancement mode epad mosfet devices, which require a positive bias voltage to turn on. precision threshold values such as +1.40v, +0.80v, +0.20v are offered. no conductive channel exists between the source and drain at zero applied gate voltage for these devices, except that the +0.20v version has a subthreshold current at about 20na. the ald1148xx/ald1149xx (quad/dual) features depletion mode epad mosfets, which are normally-on devices when the gate bias voltage is at zero volt. the depletion mode threshold voltage is at a negative voltage level at which the epad mosfet turns off. without a supply voltage and/or with v gs = 0.0v the epad mosfet device is already turned on and exhibits a defined and controlled on-resistance between the source and drain terminals. the ald1148xx/ald1149xx depletion mode epad mosfets are different from most other types of depletion mode mosfets and certain types of jfets in that they do not exhibit high gate leakage currents and channel/junction leakage currents. when negative signal voltages are applied to the gate terminal, the designer/user can depend on the epad mosfet device to be controlled, modu- lated and turned off precisely. the device can be modulated and turned-off under the control of the gate voltage in the same manner as the enhancement mode epad mosfet and the same device equations apply. epad mosfets are ideal for minimum offset voltage and differen- tial thermal response, and they are used for switching and amplify- ing applications in low voltage (1v to 10v or +/-0.5v to +/-5v) or ultra low voltage (less than 1v or +/- 0.5v) systems. they feature low input bias current (less than 30pa max.), ultra low power (microwatt) or nanopower (power measured in nanowatt) opera- tion, low input capacitance and fast switching speed. these de- vices can be used where a combination of these characteristics are desired. key application environment epad( mosfet array products are for circuit applications in one or more of the following operating environments: * low voltage: 1v to 10v or +/- 0.5v to +/- 5v * ultra low voltage: less than 1v or +/- 0.5v * low power: voltage x current = power measured in microwatt * nanopower: voltage x current = power measured in nanowatt * precision matching and tracking of two or more mosfets electrical characteristics the turn-on and turn-off electrical characteristics of the epad mosfet products are shown in the drain-source on current vs drain-source on voltage and drain-source on current vs gate- source voltage graphs. each graph show the drain-source on current versus drain-source on voltage characteristics as a func- tion of gate-source voltage in a different operating region under different bias conditions. as the threshold voltage is tightly speci- fied, the drain-source on current at a given gate input voltage is better controlled and more predictable when compared to many other types of mosfets. epad mosfets behave similarly to a standard mosfet, there- fore classic equations for a n-channel mosfet applies to epad mosfet as well. the drain current in the linear region (v ds < v gs - v gs(th) ) is given by: i d = u . c ox . w/l . [v gs - v gs(th) - v ds /2] . v ds where: u = mobility c ox = capacitance / unit area of gate electrode v gs = gate to source voltage v gs(th) = turn-on threshold voltage v ds = drain to source voltage w = channel width l = channel length in this region of operation the i ds value is proportional to v ds value and the device can be used as gate-voltage controlled resistor. for higher values of v ds where v ds >= v gs - v gs(th) , the satura- tion current i ds is now given by (approx.): i ds = u . c ox . w/l . [v gs - v gs(th) ] 2 performance characteristics of epad? precision matched pair mosfet family
ald110808/ald110808a/ald110908/ald110908a advanced linear devices 4 of 11 sub-threshold region of operation low voltage systems, namely those operating at 5v, 3.3v or less, typically require mosfets that have threshold voltage of 1v or less. the threshold, or turn-on, voltage of the mosfet is a voltage below which the mosfet conduction channel rapidly turns off. for analog designs, this threshold voltage directly affects the operating signal voltage range and the operating bias current levels. at or below threshold voltage, an epad mosfet exhibits a turn- off characteristic in an operating region called the subthreshold re- gion. this is when the epad mosfet conduction channel rapidly turns off as a function of decreasing applied gate voltage. the con- duction channel induced by the gate voltage on the gate electrode decreases exponentially and causes the drain current to decrease exponentially. however, the conduction channel does not shut off abruptly with decreasing gate voltage, but decreases at a fixed rate of approximately 116mv per decade of drain current decrease. thus if the threshold voltage is +0.20v, for example, the drain current is 1ua at v gs = +0.20v. at v gs = +0.09v, the drain current would decrease to 0.1ua. extrapolating from this, the drain current is 0.01ua (10na) at v gs = -0.03v, 1na at v gs = -0.14v, and so forth. this subthreshold characteristic extends all the way down to cur- rent levels below 1na and is limited by other currents such as junc- tion leakage currents. at a drain current to be declared ?zero current? by the user, the vgs voltage at that zero current can now be estimated. note that using the above example, with v gs(th) = +0.20v, the drain current still hovers around 20na when the gate is at zero volt, or ground. low power and nanopower when supply voltages decrease, the power consumption of a given load resistor decreases as the square of the supply voltage. so one of the benefits in reducing supply voltage is to reduce power consumption. while decreasing power supply voltages and power consumption go hand-in-hand with decreasing useful ac bandwidth and at the same time increases noise effects in the circuit, a circuit designer can make the necessary tradeoffs and adjustments in any given circuit design and bias the circuit accordingly. with epad mosfets, a circuit that performs a specific function can be designed so that power consumption can be minimized. in some cases, these circuits operate in low power mode where the power consumed is measure in micro-watts. in other cases, power dissipation can be reduced to nano-watt region and still provide a useful and controlled circuit function operation. zero temperature coefficient (ztc) operation for an epad mosfet in this product family, there exist operating points where the various factors that cause the current to increase as a function of temperature balance out those that cause the cur- rent to decrease, thereby canceling each other, and resulting in net temperature coefficient of near zero. one of this temperature stable operating point is obtained by a ztc voltage bias condition, which is 0.55v above a threshold voltage when v gs = v ds , resulting in a temperature stable current level of about 68ua. for other ztc op- erating points, see ztc characteristics. performance characteristics performance characteristics of the epad mosfet product family are shown in the following graphs. in general, the threshold voltage shift for each member of the product family causes other affected electrical characteristics to shift with an equivalent linear shift in v gs(th) bias voltage. this linear shift in v gs causes the subthresh- old i-v curves to shift linearly as well. accordingly, the subthreshold operating current can be determined by calculating the gate volt- age drop relative from its threshold voltage, v gs(th) . rds(on) at vgs=ground several of the epad mosfets produce a fixed resistance when their gate is grounded. for ald110800, the drain current at v ds = 0.1v is at 1ua at v gs = 0.0v. thus just by grounding the gate of the ald110800, a resistor with r ds(on) = ~100kohm is produced. when an ald114804 gate is grounded, the drain current i ds = 18.5 ua@ v ds = 0.1v, producing r ds(on) = 5.4kohm. similarly, ald114813 and ald114835 produces 77ua and 185ua, respec- tively, at v gs = 0.0v, producing r ds(on) values of 1.3kohm and 540ohm, respectively. matching characteristics a key benefit of using matched-pair epad mosfet is to maintain temperature tracking. in general, for epad mosfet matched pair devices, one device of the matched pair has gate leakage currents, junction temperature effects, and drain current temperature coeffi- cient as a function of bias voltage that cancel out similar effects of the other device, resulting in a temperature stable circuit. as men- tioned earlier, this temperature stability can be further enhanced by biasing the matched-pairs at zero tempco (ztc) point, even though that could require special circuit configuration and power consump- tion design consideration. performance characteristics of epad? precision matched pair mosfet family (cont.)
ald110808/ald110808a/ald110908/ald110908a advanced linear devices 5 of 11 typical performance characteristics 5 4 3 2 1 0 10 8 6 4 2 0 drain source on current (ma) drain-source on voltage (v) output characteristics t a = +25 c v gs -v gs(th) =+5v v gs -v gs(th) =+4v v gs -v gs(th) =+3v v gs -v gs(th) =+2v v gs -v gs(th) =+1v drain-source on resistance  vs. drain-source on current   drain-source on current ( a) 2500 2000 1000 1500 0 500 10 10000 100 1000 drain-source on resistance  ( ? ) t a = 25 c v gs = v gs(th) +6v v gs = v gs(th) +4v transconductance vs. ambient temperature   transconductance  (ma/v) ambient temperature ( c) -50 -25 0 25 50 125 100 75 2.5 2.0 1.5 1.0 0 0.5 forward transfer characteristics  20 drain- source on current (ma ) gate-source voltage (v) -4 0 10 0 -2 24 6 8 10 5 15 t a = 25 c v ds = +10v v gs(th) = -1.3v v gs(th) = -3.5v v gs(th) = +1.4v v gs(th) = -0.4v v gs(th) = 0.0v v gs(th) = +0.2v v gs(th) = +0.8v subthreshold forward transfer  characteristics  gate-source voltage (v) drain-source on current (na)  100000 10000 1000 100 10 1 0.1 0.01 -4 -3 -2 -1 0 1 2 v gs(th) =-3.5v v gs(th) =-1.3v t a = +25 c v ds =+0.1v v gs(th) =0.0v v gs(th) =-0.4v v gs(th) =+1.4v v gs(th) =+0.2v v gs(th) =+0.8v subthreshold forward transfer characteristics gate-source voltage (v) -0.5 -0.4 -0.3 -0.2 -0.1 1000 100 10 1 0.1 0.01 drain-source on current (na) v gs(th) v gs(th) v gs(th) v gs(th) v gs(th) v gs(th) v ds =0.1v slope = 110mv/decade ~
ald110808/ald110808a/ald110908/ald110908a advanced linear devices 6 of 11 typical performance characteristics (cont.) drain source on current vs. output voltage 5 4 3 2 1 0 drain source on current (ma) output voltage (v) v gs(th) v gs(th) +3 v gs(th) +2 v gs(th) +4 v gs(th) +1 v gs(th) +5 v ds = +5v v ds = +1v v ds = +10v t a = 25 c offset voltage vs. ambient temperature ambient temperature ( c) -50 -25 0 25 50 125 100 75 4 3 2 1 0 -1 -2 -3 -4 offset voltage (mv) representative units gate leakage current  vs. ambient temperature gate leakage current (pa)   -50 -25 0 25 50 125 100 75 500 400 300 200 600 100 0 ambient temperature ( c) i gss drain source on current, bias  current vs. ambient temperature gate and drain source voltage (vgs = vds) (v)   5 4 3 2 1 0 drain source on current (ma)  70 c 125 c -25 c 0 c -55 c v gs(th) v gs(th) +3 v gs(th) +2 v gs(th) +4 v gs(th) +1 v gs(th) -1 drain-source on current vs. on resistance   on resistance (k ? ) drain-source on current ( a)  100000 10000 1000 100 10 1 0.1 0.01 10000 0.1 10 1 100 1000 v ds =+0.1v v ds =+1v v ds =+5v v ds =+10v t a = 25 c v gs =-4.0v to +5.4v gate source voltage  vs. on - resistance   0.1 1 100 10 1000 10000 +25 c gate source voltage (v) on - resistance (k ? ) +125 c v ds i ds(on) d v gs s 0.0v v ds 5.0v v gs(th) v gs(th) +3 v gs(th) +2 v gs(th) +4 v gs(th) +1 drain source on current, bias current vs. ambient temperature gate and drain source voltage (vgs = vds) (v) 100 50 0 drain source on current ( a) zero temperature coefficient (ztc) - 25 c 125 c +0.8 +0.4 +0.6 +0.2 v gs(th) +1.0 v gs(th) +0.0 v gs(th) v gs(th) v gs(th) v gs(th) gate source voltage vs. drain source on current drain source on current ( a) gate source voltage (v) 0.1 1 100 10 1000 10000 v ds = 0.5v t a = +125 c v ds = 0.5v t a = +25 c v ds = 5v t a = +25 c v ds = 5v t a = +125 c s v ds = r on ? i ds(on) v gs(th) v gs(th) +3 v gs(th) +2 v gs(th) +4 v gs(th) +1 v gs(th) -1 v ds i ds(on) d v gs
ald110808/ald110808a/ald110908/ald110908a advanced linear devices 7 of 11 typical performance characteristics (cont.) drain - gate diode connected voltage tempco vs. drain source on current   5 drain- gate diode connected  voltage tempco (mv/ c ) drain source on current ( a) 1 10 100 1000 -55 c t a +125 c 0 -5 -2.5 2.5 normalized subthreshold  characteristics relative gate threshold voltage   drain-source current (na) 0.3 0.2 0.1 0 -0.1 -0.2 gate-source voltage - threshold  voltage (v) v gs - v gs(th)    -0.3 -0.4 10000 1000 100 10 1 0.1 v d = 0.1v 55 c 25 c tranconductance vs. drain-source  on current drain -source on current(ma) tarnconductance ( m ? -1 )  2 4 6 8 10  0.0  1.2 0.9 0.6 0.3 0 t a = 25 c v ds = +10v     0.5 1.0 2.0 5.0 0.2 0.1 drain-source on voltage (v) zero tempereture coefficient characteristic gate-source voltage - threshold voltage (v)  0.0 0.2 0.5 0.6 0.3 v gs(th) =-3.5v v gs(th) =-1.3v, -0.4v, 0.0v, +0.2v, +0.8v, +1.4v transfer characteristics  gate-source voltage (v) -4 -2 0 2 4 8 10 6 1.6 1.2 0.8 0.4 transconductance ( m ? -1 )  0.0 t a = 25 c v ds = +10v v gs(th) = -3.5v v gs(th) = -0.4v v gs(th) = 0.0v v gs(th) = +0.2v v gs(th) = +0.8v v gs(th) = -1.3v v gs(th) = +1.4v  gate-source voltage (v)  subthreshold characteristics      drain -source current (na) 2.5 2.0 1.0 0.5 0.0 1.5 -0.5    100000 10000 1000 100 10 1 0.1 55 c v gs(th) = 0.2v  v gs(th) = 0.4v  25 c threshold voltage (v) threshold voltages vs. ambient temperatures ambient temperature ( o c) 2.0 1.0 -1.0 -2.0 -3.0 0.0 -4.0 -25 25 75 125 i ds = +1 a v ds = +0.1v v gs(th) = -0.4v v gs(th) = -1.3v v gs(th) = -3.5v v gs(th) = 0.0v threshold voltage vs. ambient temperature 4.0 3.0 2.0 0 threshold votage (v) ambient temperature ( c) -50 -25 0 25 50 125 100 75 1.0 v ds = +0.1v i d = 1.0 a v t = 0.8v v t = 1.4v v t = 0.4v v t = 0.2v v t = 0.0v
ald110808/ald110808a/ald110908/ald110908a advanced linear devices 8 of 11 16 pin plastic soic package e d e a a 1 b s (45 ) l c h s (45 ) ? millimeters inches min max min max dim 1.75 0.25 0.45 0.25 10.00 4.05 6.30 0.937 8 0.50 0.053 0.004 0.014 0.007 0.385 0.140  0.224 0.024 0 0.010  0.069 0.010 0.018 0.010 0.394 0.160 0.248 0.037 8 0.020 1.27 bsc 0.050 bsc 1.35 0.10 0.35 0.18 9.80 3.50 5.70 0.60 0 0.25 a a 1 b c d-16 e e h l s ? soic-16 package drawing
ald110808/ald110808a/ald110908/ald110908a advanced linear devices 9 of 11 16 pin plastic dip package millimeters inches min max min max dim a a 1 a 2 b b 1 c d-16 e e 1 e e 1 l s-16 ? 3.81 0.38 1.27 0.89 0.38 0.20 18.93 5.59 7.62 2.29 7.37 2.79 0.38 0 5.08 1.27 2.03 1.65 0.51 0.30 21.33 7.11 8.26 2.79 7.87 3.81 1.52 15 0.105 0.015 0.050 0.035 0.015 0.008 0.745 0.220 0.300 0.090 0.290 0.110 0.015 0 0.200 0.050 0.080 0.065 0.020 0.012 0.840 0.280 0.325 0.110 0.310 0.150 0.060 15 pdip-16 package drawing b 1 d s b e a 2 a 1 a l e e 1 c e 1 ?
ald110808/ald110808a/ald110908/ald110908a advanced linear devices 10 of 11 8 pin plastic soic package e l c h e d a a 1 b s (45 ) s (45 ) ? millimeters inches min max min max dim a a 1 b c d-8 e e h l s 1.75 0.25 0.45 0.25 5.00 4.05 6.30 0.937 8 0.50 0.053 0.004 0.014 0.007 0.185 0.140 0.224 0.024 0 0.010  0.069 0.010 0.018 0.010 0.196 0.160 0.248 0.037 8 0.020 1.27 bsc 0.050 bsc 1.35 0.10 0.35 0.18 4.69 3.50 5.70 0.60 0 0.25 ? soic-8 package drawing
ald110808/ald110808a/ald110908/ald110908a advanced linear devices 11 of 11 8 pin plastic dip package millimeters inches min max min max dim a a 1 a 2 b b 1 c d-8 e e 1 e e 1 l s-8 ? 3.81 0.38 1.27 0.89 0.38 0.20 9.40 5.59 7.62 2.29 7.37 2.79 1.02 0 5.08 1.27 2.03 1.65 0.51 0.30 11.68 7.11 8.26 2.79 7.87 3.81 2.03 15 0.105 0.015 0.050 0.035 0.015 0.008 0.370 0.220 0.300 0.090 0.290 0.110 0.040 0 0.200 0.050 0.080 0.065 0.020 0.012 0.460 0.280 0.325 0.110 0.310 0.150 0.080 15 pdip-8 package drawing b 1 s b e e 1 d e a 2 a 1 a l c e 1 ?


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